Lab Objective:
The objective of this lab exercise is to verify Cisco HDLC encapsulation, which is the default encapsulation method for WAN interfaces on Cisco IOS routers.
Lab Purpose:
Cisco HDLC verification is a fundamental skill. Cisco HDLC encapsulation is the default encapsulation on all Cisco router Serial interfaces. As a Cisco engineer, as well as in the Cisco CCNA exam, you will be expected to know how to verify Cisco HDLC encapsulation.
Certification Level:
This lab is suitable for both CCENT and CCNA certification exam preparation.
Lab Difficulty:
This lab has a difficulty rating of 2/10.
Readiness Assessment:
When you are ready for your certification exam, you should complete this lab in no more than 10 minutes.
Lab Topology:
Please use the following topology to complete this lab exercise:
Task 1:
Configure hostnames on R1 and R2 as illustrated in the topology.
Task 2:
Enable Serial interfaces on R1 and R2. The Serial0/0 interface on R2 is identified as the DCE in the topology. Configure the DCE interface on R2 to provide clocking to R1. The clock speed should be 256 Kbps. Remember that 1 Kbps = 1000 bps. Verify that R2 is sending clocking information and that R1 receives this information from R2.
Task 3:
Configure IP addressing on R1 and R2 Serial0/0 interfaces as illustrated in the topology. Verify your interface encapsulation, which should be HDLC by default.
Task 4:
Enable debugging on the Cisco router to validate that HDLC keepalive messages are being sent between the two routers. Ensure that you disable debugging when you are finished. Verify that HDLC messages are sent in the keepalive interval that is listed under the interface, which should be approximately every 10 seconds.
Configuration and Verification
Task 1:
For reference information on configuring hostnames, please refer to earlier labs.
Task 2:
R1(config)#interface serial0/0 R1(config-if)#no shut *Mar 1 00:36:47.282: %LINK-3-UPDOWN: Interface Serial0/0, changed state to down R1(config-if)#end R1# R2(config)#interface serial0/0 R2(config-if)#no shut *Mar 1 00:36:47.282: %LINK-3-UPDOWN: Interface Serial0/0, changed state to down R2(config-if)#end R2#show controllers serial0/0 Interface Serial0/0 Hardware is PowerQUICC MPC860 DCE V.35, no clock
NOTE: The show controllers command will tell you whether the interface is the DCE side (which provides the clocking) or the DTE side (which receives the clocking) on a particular router interface.
R2#conf t Enter configuration commands, one per line. End with CTRL/Z. R2(config)#interface serial0/0 R2(config-if)#clock rate 256000 R2(config-if)#end R2# R2#show controllers serial0/0 Interface Serial0/0 Hardware is PowerQUICC MPC860 DCE V.35, clock rate 256000 R1#show controllers serial0/2 Interface Serial0/0 Hardware is PowerQUICC MPC860 DTE V.35 TX and RX clocks detected.
Task 3:
For reference information on configuring IP addressing, please refer to earlier labs.
R1#show interfaces serial0/0 Serial0/0 is up, line protocol is up Hardware is PowerQUICC Serial Internet address is 172.30.100.1/30 MTU 1500 bytes, BW 1544 Kbit, DLY 20000 usec, reliability 255/255, txload 1/255, rxload 1/255 Encapsulation HDLC, loopback not set Keepalive set (10 sec) R2#show interfaces serial0/0 Serial0/0 is up, line protocol is up Hardware is PowerQUICC Serial Internet address is 172.30.100.2/30 MTU 1500 bytes, BW 1544 Kbit, DLY 20000 usec, reliability 255/255, txload 1/255, rxload 1/255 Encapsulation HDLC, loopback not set Keepalive set (10 sec)
Task 4:
R1#debug serial interface Serial network interface debugging is on *Mar 1 01:17:34.686: Serial0/0: HDLC myseq 232, mineseen 232*, yourseen 230, line up *Mar 1 01:17:44.686: Serial0/0: HDLC myseq 233, mineseen 233*, yourseen 231, line up *Mar 1 01:17:54.687: Serial0/0: HDLC myseq 234, mineseen 234*, yourseen 232, line up R1# R1# R1#undebug all All possible debugging has been turned off